From: route@monster.com
Sent: Monday,
October 24, 2016 10:31 AM
To: hg@apeironinc.com
Subject: Please
review this candidate for: DNS Secret
This resume has been forwarded to
you at the request of Monster User xapeix03
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James R. Pruitt jimp3020@gmail.com Phone: 503-698-3722 Qualifications / Experience: Insight
Global – Contractor at HP Inc., March 21, 2016 to Present ·
Position /
Accomplishments: o
Developing
test automation interface enhancements for HP business printers. o
Embedded
Linux firmware development. Volt
Services – Contractor Lewis Controls, Mar 23, 2015 – Jan 4, 2016 ·
Position /
Accomplishments o
Software
Engineer doing maintenance/feature enhancements for saw mill automation
customers nationwide. o
Programming
entails HW/SW controls for AC/DC circuitry (PLC and I/O boards) used to
control laser scanners, encoders, servos, etc. o
Win32 C
development running with TenAsys InTime RTOS Kelly
Services - Contractor at Intel, Sept 23, 2013 – Feb 18, 2015 ·
Position /
Accomplishments o
Senior
software engineer in Intel’s Data Center Group developing C code for Intel’s
embedded Management Engine (ME) firmware with Thread X multi-threaded RTOS
kernel on an ARC processor used on XEON servers. §
HW tools /
infrastructure: ·
Metaware JTAG
debugger ·
Aardvark
I2C/SPI Host Adapter ·
Beagle
I2C/SPI Protocol Analyzer ·
DediProg
EM100 for Flash emulation ·
TotalPhase
SF100 for burning Flash chips ·
Labs uses
Raritan and Avocent KVMs-over IP ·
Intelligent
rack PDUs (intelligent rack Power Distribution Units). ·
20GbE LAN
using Cisco/Arista switches using switched VLANs. §
SW tools: ·
WireShark for
analyzing IPv4/IPv6 network traffic. ·
IPMITool – SW
tool to communication and configure the Intel ME using IPMI standard. ·
ARC compiler §
Project
tools: ·
QuickBuild
for continuous integration ·
Klocwork - C
code conformance ·
Git ·
IBM Rational
tools: o
Clear Case
for revision control, o
Clear Quest
for defect tracking o
RTC for Agile
based project management. Ended up switching to Kanban approach. Insight
Global – Contractor at Cisco Systems - Jan 2013 – Sept 20, 2013 ·
Position /
Accomplishments o
BIOS QA
Validation engineer testing UEFI BIOS for Cisco’s UCS B-Series blades for
their Unified Computing System for datacenters. §
Tested BIOS,
Base Board Management Controller (Emulex server chip) and UCS Management GUI
written in Java. This GUI is used for managing configuration and monitoring
of the XEON blades within the UCS data center chassis. §
Analyzed and
trouble shooted server BMC SEL events and faults reported by BMC that are
displayed in UCSM GUI. §
Tested boot
order, SOL and PXE testing under UEFI §
Tested SMBIOS
tables in UEFI. §
Tested UCS
firmware updates for UCSM, Fabric, IOM, Adapters and BMC. §
Testing
VMWare ESX, Solaris, Red HAT, SLES, Windows Servers 2008 R2/2012 OS
installations. §
Testing USB,
Network access and Virtual Media operation. §
Used Intel
ITP II JTAG debugger (a.k.a PDT) for firmware debug §
Other testing
included ACPI, CPU, PCIe, DDR3, TPM, VT-d, SRIOV, SD Card, and UCSM
profiles/policies. Intel
Corporation – Sept 1995 – Dec 1 2012 ·
Position /
Accomplishments o
Component
Engineer §
Lead
Execution Engineer - Responsible for establishing the automation environment
and status reporting procedures for silicon validation for Intel’s SoC
tablet/phone Atom processor. Here I lead the coordination effort with sites
around the world (China, India, Indonesia, Mexico and the US). Primary task
was to architect the HW/SW tools required for Atom silicon testing.
Responsible for reporting to upper level management ongoing lab
infrastructure readiness and ongoing status. §
Developed C#
ASP.Net/CSS web site that interfaced with 4 enterprise databases and a
Subversion repository to achieve “Continuous Integration” with SW builds
using open source Cruise Control. §
Established
Cross site QA processes and procedures for achieving cross site efficiency
improvements. §
Assisted division’s
Validation Architect to define/enhance silicon coverage tools in both the
pre-silicon and post silicon testing where I worked directly with Israel
engineers driving and documenting methodology enhancements. §
Led testing
effort on final silicon stepping of Tylersburg chipset. Here I coordinated
all lab activities and testing. As program manager I reported directly to
upper management all platform, BIOS and test infrastructure issues. The
validation of this chipset gated Intel’s public/OEM release of the Nehalem
i3/i5/i7 processors. As a result of my effort, Intel launched all products on
time. §
Developed
post silicon Execution validation strategy for Nehalem, Lynnfield and
Westmere i5/i7 processors for the division. I specified the plans for
validating processor silicon stepping’s detailing what testing environment
and how much testing to complete the stepping validation cycle. Reported
directly to senior management. o
Senior SW
Engineer - Emulation §
Developed
Perl scripts under SUSE Linux Enterprise Server to enable automation
to load tests from Intel’s internal data center to validate Intel processors.
Scripts were responsible for launching millions of tests from Intel’s data
center that were downloaded to Falcon CPU emulators. o
HW Debug
Engineering Manager §
Managed a
team of HW/SW Debug Engineers and college intern on Tulsa XEON processor that
completed all “root cause failure analysis” on open/gating issues 3 months
ahead of schedule facilitating an early launch of the Tulsa XEON processor. o
Lead SW
Engineer §
Test
Development Team Lead directing 15 HW/SW engineers, contractors and one
intern. Here I directed test development activities and tracked schedules for
silicon validation of Intel XEON processors. Tests were written in C/x86
assembly with an in-house no-OS host/target runtime environment using
Metaware compiler with SSI Link&Locate 386 linker. A custom PCIe card
with an in-house loader then loaded OMF image directly into target memory. In
this environment, I developed the strategy and tests for 40 bit physical
addressing on XEON processors for x86/EM64T. Architected Project Server
schedule tracking for 300 focus tests. Logged/updated bugs against automation
infrastructure, validation tests and BIOS using in-house databases. o
Senior
Software Engineer §
Responsible
for developing tools and tests to validate IA32 server chipsets. Focus was on
the chipset memory controller. Used Visual Basic 6.0 with Excel OLE
automation for generating EFI BIOS memory configuration settings. §
Worked in the
server compatibility lab where my role was to test and validate new
technology capabilities in the Microsoft Server and Unix OS environments. Job
focused on the introduction of automation, new technologies and test
methodologies as well as the added responsibility of incorporating into a lab
environment. SW developed in this group included: §
Wrote PCI-X
stress tests in C under custom Linux OS for analog validation using Agilent
PCI-X Analyzer test cards. §
Automated
LeCroy oscilloscope using VB6 to validate SCSI signal integrity using a DOS
keyboard wedge and a GPIB VISA interface using MS Word OLE automation to
generate a Word document that collected/documented the test results.
Dramatically decreased time to verify/document SCSI signal integrity. §
Enhanced
Windows SCSI I/O testing by adding Windows raw I/O system calls to an
established test suite that eliminated file system overhead. §
Worked C/C++
multi-threaded C/assembly system stress tests for Linux (pThreads) / Windows
on both IA32 and IA64 platforms. § Automated target testing with a simulation tool from
Testquest that controlled mouse, keyboard, video capture/recognition that
automated OS installations/setup that and used C++ framework for scripting
the automation. § Developed tests/scripts for processor/chipset validation
using Intel and American Arium CPU JTAG
debuggers.
§ Wrote a console application control stress to servers
using VB 6 that program that used 2 DCOM interfaces with a VB GUI and Win32
APIs with Winsock interfacing. The application controlled target stress on 32
servers across 4 subnets and allowed multiple network threads on a NIC. The
tests were adopted to test blade servers. Installation routine included a
Visual Test script to setup IIS on Win2K Advanced Server. §
Team Lead
primarily responsible for writing C/ASM diagnostics for the Sandia National
Laboratories Teraflops Super Computer. At the time, the Intel Teraflops
machine was fastest supercomputer in world. Team was comprised of Intel
employees and contractors. Approach taken was to enhance the Intel JTAG
debugger so that tests were able to load and run diagnostic executables in
the processor’s cache (no dependency on BIOS/Operating System/Memory). This
approach enabled board level diagnostics to be ran at speed without memory
installed and was used for functional and fault isolation on the motherboards
in manufacturing. Code was tested using the various HW test equipment: JTAG
debugger, Tektronix Logic Analyzer and a SCSI bus analyzer. Technical
Solutions Inc. – Jun 1995 - Aug 1995 ·
Position /
Accomplishments o
Company:
Contractor to CFI ProServices (purchased by Harland Financial Services and
later by D+H) o
I was
responsible for C language code in enhancements for online banking bill payer
software. HP-UX environment. Whittaker
Corporation – Mar 1995 - Jun 1995 ·
Position /
Accomplishments o
Developed C
code for user interface and “Make” files for ATM, SONET WAN switch. SW was
targeted for AMD embedded processor and SW feature set included SNMP querying
as well as a user interface implemented with Telnet. The remote debugging
utilized a serial interface on an OS-2 host. Northwest
Software Inc. – Jan 1995 - Mar 1995 ·
Position /
Accomplishments o
As a
contractor, I enhanced build SW for Intel’s ProShare video system written in
C++. The build process was reduced from 4 to 1.5 hours. Clam
Associates - Jan 1994 - Nov 1994 ·
Position /
Accomplishments o
Company
mostly did contract work for IBM on AIX – High Availability Cluster software
via IP on IBM RS-6000 servers. Worked on HA and tape backup procedures
for IBM AIX OS. Flight
Dynamics – Oct 1992 - Jan 1994 ·
Position /
Accomplishments o
Flight
Dynamics made “head-up” displays for commercial aircraft.
Responsibilities included prototyping embedded software for the DASH8
aircraft. Specifically this included 1) modifying existing PLM/ASM code
for two 8086 I/O processors 2) design and implementation of C/ASM code
targeted for 2 Intel 80960KB processors and 3) documentation written to
DO-178A standards. Code was debugged with HP/INTEL
In-Circuit-Emulators, logic analyzers and various other types of test
equipment including VME test rack running OS-9 RTOS. Vitro Corporation – Aug 1991 - Oct 1992
·
Position /
Accomplishments o
Project was a
man-machine interface enhancement that replaced an aging Navy computer used
for reconstruction of antisubmarine warfare flight missions. The project used
Sun OS with real-time extensions. Responsibilities included designing
the Client/Server SW for the I/O MCPL board, system initialization code,
general Acoustic software interface SW, interfacing Ada modules to UNIX OS
i.e. developed Ada bindings to Sun OS system calls. GUI was developed
using a MOTIF GUI code generator on Sun workstations. Requirements and design
were done using Cadre Teamwork CASE tool that utilized Context Diagrams,
DFDs, Structure Charts, PATs and STDs. Boeing Corporation - Sep 1987 - Aug 1991
·
Position /
Accomplishments o
I developed
embedded SW written in C and Ada for a P-3 aircraft avionics system. I was
one of approximately 150 SW engineers on the project at Boeing. My SW
responsibilities included writing control SW for a SCSI high-density digital
recorder and localization algorithms used in antisubmarine warfare. Boeing
was the principle contractor for the 500 million dollar DoD project. The
design was formalized using the Cadre CASE tool Teamwork to implement context
diagrams, DFDs and structure charts. System was interfaced with other
computers sub-contracted by Motorola, Raytheon and AT&T, just to name a
few. o
Testing was
accomplished using target compatible Sun 68020 workstations and emulators
with enough pods to populate all 5 processors associated with the target
hardware. Personal
.Net Experience: ·
As a
contractor in 2006, I developed several VB.Net multi-threaded programs with
Visual Studio 2005 (VB.Net) that interfaced/generated MS Excel spreadsheets
(OLE automation). Both programs had an accompanying MS SQL Server 2005
Express database. Software deliverables were deployed with installation
program. Crystal Reports was used for generating PDF reports. Software was
developed to assist/automate maintenance crews doing oil rig inspections in
the Gulf of Mexico. ·
Developed an
ASP.NET web site with C# and .net 4.5 using jQuery / jQuery UI, HTML5, CSS3,
Ajax Control Toolkit and Flash using VS 2012 Ultimate. Education: BS, Computer Science, Portland State
University, 1987
Military Service: US Navy – March 73 to Dec 76 – DD214
Release (Honorable Discharge) Ranks: E-1 to E-4 Responsibilities: 1.
Senior sonar
operator - Navy P-3 Orion ASW aircraft US Navy Reserve - Jan 77 to 97 (Retired) Ranks: E-4 to E-7 (Chief Petty Officer),
retired as a Lieutenant (O-3) Responsibilities: 1.
NATOPS
Instructor/Evaluator on P-3 aircraft 2.
Brief/Debrief
Officer for P-3 Orion recognizance missions - Anti-Submarine Warfare
Operation Centers. Prior Security Clearances: Civilian Clearance - Secret - Boeing and
Vitro. Military Clearance - Secret - U.S. Navy /
U.S. Naval Reserve US Passport: Valid till 2020 1 |
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Languages: |
Languages |
Proficiency Level |
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English |
Fluent |
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